Realization of rank order filters based on majority gate

-A new technique for the implementation of a single hardware structure capable of computing any rank order filter is presented in this paper. The proposed technique, which is based on the majority gate, achieves faster extraction of setting flag signals and, therefore, shorter processing times are attained. A pipelined systolic array, suitable for performing rank order filtering, is also presented. Applications of rank order filters include digital image processing, speech processing and coding and digital TV applications. ~ 1997 Pattern Recognition Society. Published by Elsevier Science Ltd. Nonlinear filters Computer vision l. INTRODUCTION Rank order filters are a class of nonlinear filters. The input of such filters is a window of data with an odd number of elements. These elements are sorted in ascending order and the output of the rank order filter with rank r is the rth element (rth order statistic)J 1) Special cases of rank order filters are median, minimum and maximum filters, where the outputs are the median, the minimum and the maximum values of the input data window, respectively. Rank order filters exhibit excellent robustness properties and provide solutions in many cases where linear filters are inappropriate. They can suppress high-frequency and impulse noise in an image, avoiding at the same time extensive blurting of the image, since they have good edge preservation properties. They have found numerous applications, such as in digital image analysis, in speech processing and coding, in digital TV applications, etc. (~'2) Median and rank order filters are strongly related with morphological filters, another class of nonlinear illters. (3'4) It has been shown that erosions and dilations are special cases of rank order filters and that any rank order filter can be expressed either as a maximum of erosions or as a minimum of dilations. °) Therefore, algorithms which originally have been devised for rank order and median filters can be used for realization of morphological operators. (5'6) Several algorithms have been proposed for the realization of rank order filters, such as tree sorts, shell sorts and quick sorts. (1) Although these algorithms are suitable for software implementation, they result in inefficient hardware structures, since they handle the numbers in wordlevel. Rank order filters can be implemented in VLSI * Author to whom correspondence should be addressed. Email: ioannis @ orfeas.ee.duth.gr. using the threshold decomposition technique. (7-9) However, in this case hardware complexity increases exponentially with both the resolution of the numbers and the size of the data window. Therefore, implementation of filters capable of handling high-resolution numbers is not practical. Bit-sliced algorithms suitable for hardware implementation have been proposedJ 1°'11) In these implementations, the numbers are handled in bit-level in order to obtain local minima and maxima, from which the rth order statistic is obtained. However, several building blocks are required to implement the local minima and maxima functions, and, thus, the hardware complexity increases. Different hardware structures of an efficient algorithm for rank order filters have been presentedJ 12-14) These are based on the selection of intermediate signals through a device which gives output "1" if the number of its inputs which are "1" is greater or equal to the rank of the filter, otherwise its output is "0" . This device has been implemented using the following techniques: 1. Comparison after summation, (12) 2. Positive Boolean Functions (PBF) °3) and 3. CMOS programmable device) 14) The device for the median computation (majority gate) is shown in Fig. 1. It is a nonlinear voltage divider, built by output-wired inverters and an inverting buffer. The latter approach is the most advantageous in terms of silicon area among the three. It replaces either an N 1-bit binary tree adder and a [log2(N)+ 1 ]-bit comparator (comparison after summation technique) or N÷ 1 gates of N 1 inputs (PBF technique), with 2N÷2 transistors. However, once the device has been designed, the rank order of the filter is fixed (PBF and CMOS programmable device approaches). In the comparison after summation approach, it is possible to implement any rank order